SEALSQ Corp (NASDAQ: LAES) (“SEALSQ” or “Company”), a leader in semiconductor, PKI, and post-quantum technology solutions today announced its participation at the inauguration of Kaynes Semicon’s state-of-the-art Outsourced Semiconductor Assembly and Test (OSAT) facility in Sanand, Gujarat, and within it, the first phase localization of the planned SEALSQ–Kaynes Post-Quantum Cryptography (PQC) Personalization Center (‘the Center”), which will be India’s first facility dedicated to the sovereign, large-scale personalization of quantum-safe semiconductor devices. The inauguration was attended by Prime Minister Narendra Modi and broadcast live across the country via Doordarshan, marking a defining moment in India’s semiconductor journey.
A New Chapter in India’s Semiconductor Sovereignty
The inauguration of the Sanand OSAT facility is far more than a milestone in manufacturing, it is a statement of strategic intent. India is no longer simply a consumer of semiconductor technology; it is building the sovereign infrastructure to produce, secure, and deploy that technology at scale. The Center, which will be physically embedded within the OSAT facility, aims to transform this ambition into operational reality.
The Center plans to enable end-to-end, sovereign semiconductor production: chips will be assembled, tested, and cryptographically personalized within a single, India-controlled environment. This aims to eliminate the need to ship uninitialized devices abroad for security provisioning, a supply chain vulnerability that has long exposed critical national infrastructure to risk. From this Center, QS7001-secured devices are planned to flow directly into India’s IoT ecosystems, digital identity programs, industrial networks, and government systems, as well as into markets across South and Southeast Asia.
Why Post-Quantum Security Cannot Wait
The threat posed by quantum computing to classical cryptography is no longer theoretical. Public-key systems, including RSA, ECC, and Diffie-Hellman, which underpin virtually all secure digital communications, are vulnerable to Shor’s algorithm, which a sufficiently powerful quantum computer could execute to break these ciphers in polynomial time. Governments, intelligence agencies, and standards bodies worldwide have concluded that the transition to post-quantum cryptography must begin now.
The urgency is compounded by the “Harvest Now, Decrypt Later” threat: adversaries are already collecting encrypted data today, with the intention of decrypting it once quantum computing becomes viable. For devices with long operational lifespans, industrial sensors, medical equipment, national identity infrastructure, this means that hardware deployed in 2026 must already be quantum-safe to remain secure through its working life. In 2024, the U.S. National Institute of Standards and Technology (NIST) finalized its first post-quantum cryptographic standards (FIPS 203, 204, and 205) establishing ML-KEM, ML-DSA, and SLH-DSA as the new global baseline. SEALSQ’s QS7001 platform implements these standards at the silicon level.
The QS7001: Quantum-Safe Security at the Hardware Root of Trust
The QS7001 is SEALSQ’s flagship post-quantum secure microcontroller, purpose-built for IoT, industrial, and critical infrastructure applications. It is a hardware security module (HSM) in silicon form, a tamper-resistant, cryptographically capable chip that serves as the root of trust for any device in which it is embedded. Its architecture combines NIST-standardized post-quantum algorithms (ML-KEM for key encapsulation, ML-DSA for digital signatures, SLH-DSA for long-term hash-based signing) with classical cryptographic capabilities (AES-256, RSA-4096, ECC P-384) to support both pure post-quantum and hybrid migration deployments.
At the hardware level, the QS7001 incorporates a True Random Number Generator (TRNG) for on-chip key generation, secure non-volatile storage from which private keys are never exposed in plaintext, a dedicated cryptographic co-processor with hardware acceleration for lattice-based algorithms, and a suite of physical security countermeasures including anti-tamper detection, automatic key zeroization, and resistance to side-channel attacks such as differential power analysis (DPA) and fault injection. Secure boot ensures that only authenticated firmware executes, while native X.509 certificate support enables seamless integration with PKI-based device identity infrastructure.
The QS7001 is designed for deployment across a broad spectrum of applications: smart factory sensors and SCADA systems, national digital identity and e-passport programs, 5G network equipment and subscriber authentication, payment terminals and financial HSMs, medical devices, smart grid infrastructure, and defense communications. In each of these contexts, the chip provides the cryptographic foundation upon which system-level security is built.
The PQC Personalization Center: Secure Identity at Industrial Scale
Chip personalization is the process by which an anonymous silicon die becomes a device with a verifiable, unforgeable identity. During personalization, each QS7001 will receive a globally unique device identifier, will have an asymmetric key pair generated on-chip using its hardware TRNG (with the private key remaining sealed inside the device), will be issued an X.509 device certificate signed by a trusted Certificate Authority, will have its post-quantum algorithm parameters loaded and locked to device-specific values, and will have its security policies, secure boot keys, and lifecycle state transitions programmed and write-protected. The result will be a chip that can authenticate itself, sign data, and establish encrypted communications with quantum-safe guarantees from the moment it leaves the facility.
The Center is planned to be built on FIPS 140-3 Level 3 certified Hardware Security Modules that aim to serve as the root of trust for all key generation and certificate signing operations. Root CA key generation is planned to be conducted through air-gapped key ceremonies with multi-party authorization controls. Every personalization event will be logged with full chain-of-custody records, compatible with MeitY compliance requirements and international standards including ISO/IEC 15408 and Common Criteria. The center is to be designed for high-volume, industrial-scale throughput to support the demands of national IoT and digital identity programs.
A defining feature of the center is intended to be the deployment of an India-sovereign intermediate Certificate Authority, jointly operated by SEALSQ and Kaynes under SEALKAYNESQ governance. Device certificates issued in Sanand are planned to be rooted in this Indian-controlled PKI node, meaning that the cryptographic trust anchor for India-deployed devices resides within India, not on foreign infrastructure. The architecture will support certificate revocation and lifecycle management, interoperability with SEALSQ’s global PKI trust chain, and alignment with India’s Personal Data Protection framework and national cybersecurity standards.
SEALKAYNESQ Ltd: A Joint Venture Built for India’s Scale
The Center will operate under the governance of SEALKAYNESQ Ltd, the joint venture in the process of being established by SEALSQ and Kaynes Semicon following the signing of an LOI in January 2026.
SEALKAYNESQ aims to bring together two complementary bodies of expertise: SEALSQ’s deep IP in post-quantum cryptography, PKI architecture, and secure semiconductor design, and Kaynes Semicon’s proven OSAT manufacturing capabilities, MeitY-aligned regulatory standing, and established relationships across India’s electronics and government ecosystem. Together, they plan to form a vertically integrated platform, from wafer-level assembly and electrical test, through to secure cryptographic personalization and sovereign certificate issuance, that is entirely India-based and India-controlled.
The initiative is being developed in active coordination with the Ministry of Electronics and Information Technology (MeitY), the central authority overseeing India’s electronics, IT, cybersecurity, and emerging technology strategy. This alignment with MeitY positions SEALKAYNESQ as a natural partner for national programs requiring trusted, certified, quantum-safe hardware, from Digital India and BharatNet IoT deployments to defense and public safety infrastructure.
Carlos Moreira, Founder & CEO, SEALSQ Corp, noted, “Our partnership with Kaynes and the launch of this PQC Personalization Center represent a critical step in enabling India to secure its digital future. By embedding post-quantum security directly into semiconductor infrastructure, and doing so on Indian soil, under Indian governance, we are helping build a resilient, sovereign, and future-proof technology ecosystem that can serve as a model for the region.”
Raghu Panicker, CEO, Kaynes Semicon, added, “The inauguration of our Sanand OSAT facility is a defining step in India’s semiconductor journey and reflects the speed at which the nation is translating vision into capability. At Kaynes Semicon, we are proud to be leading from the front by building world-class semiconductor infrastructure, strengthening trusted supply chains, and enabling advanced, secure manufacturing from India for the world. The integration of the SEALSQ PQC Personalization Center within our facility further reinforces our commitment to shaping a future-ready, resilient, and globally relevant semiconductor ecosystem.”
